| PART |
Description |
Maker |
| ASMP5P23S04A ASM5P23S04AF-1-08-SR ASM5P23S04AF-1-0 |
23S SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
3.3V ‘SpreadTrak?/a> Zero Delay Buffer
3.3V ‘SpreadTrak Zero Delay Buffer
3.3V 隆庐SpreadTrak隆炉 Zero Delay Buffer
|
PulseCore Semiconductor
|
| W162 W162-19G W162-09G |
Spread Aware? Zero Delay Buffer
Spread Aware⑩, Zero Delay Buffer
Clocks and Buffers : Clock Distribution
|
Cypress Semiconductor
|
| CY23S05 CY23S09ZC-1 CY23S09ZC-1H CY23S09SC-1 CY23S |
Low-Cost 3.3V Spread Aware?/a> Zero Delay Buffer
Low-Cost 3.3V Spread Aware Zero Delay Buffer
Low-Cost 3.3V Spread AwareZero Delay Buffer
Low-Cost 3.3V Spread Aware⑩ Zero Delay Buffer
Low-cost Spread Aware(TM) Zero Delay Buffer
|
Cypress Semiconductor Corp.
CYPRESS[Cypress Semiconductor]
|
| CY2304SC-1T CY2304SC-2T CY2304SI-1T CY2304SI-2T CY |
Zero input-output propagation delay, adjustable by capacitive load on FBK input
3.3V Zero Delay Buffer
|
Cypress Semiconductor
|
| CY23EP05SXI-1T CY23EP05SXC-1HT CY23EP05SXI-1HT CY2 |
2.5 V or 3.3 V,10-220-MHz, Low Jitter, 5 Output Zero Delay Buffer
2.5V or 3.3V,10- 220 MHz, Low Jitter, 5 Output Zero Delay Buffer 23EP SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
|
Cypress Semiconductor, Corp.
|
| 1513 1513SERIES 1513-75Y 1513-135Y 1513-2.5A 1513- |
Delay 50 /-2.5 ns, fixed SIP delay line Td/Tr=5
Delay 80 /-4 ns, fixed SIP delay line Td/Tr=5
Delay 45 /-2.3 ns, fixed SIP delay line Td/Tr=5
Delay 37.5 /-1.9 ns, fixed SIP delay line Td/Tr=5
Delay 22.5 /-1.2 ns, fixed SIP delay line Td/Tr=5
Delay 90 /-4.5 ns, fixed SIP delay line Td/Tr=5
Delay 2.5 /-1 ns, fixed SIP delay line Td/Tr=5
Fixed passive SIP delay line
FIXED SIP DELAY LINE TD/TR = 5 固话SIP延迟线运输署/训练班\u003d 5
Delay 75 /-3.8 ns, fixed SIP delay line Td/Tr=5
Delay 135 /-6.8 ns, fixed SIP delay line Td/Tr=5
Delay 3.5 /-1 ns, fixed SIP delay line Td/Tr=5
Delay 120 /-6 ns, fixed SIP delay line Td/Tr=5
Delay 30 /-1.5 ns, fixed SIP delay line Td/Tr=5
Delay 40 /-2 ns, fixed SIP delay line Td/Tr=5
Delay 25 /-1.3 ns, fixed SIP delay line Td/Tr=5
Delay 60 /-3 ns, fixed SIP delay line Td/Tr=5
Delay 140 /-7 ns, fixed SIP delay line Td/Tr=5
Delay 20 /-1 ns, fixed SIP delay line Td/Tr=5
Delay 5 /-1 ns, fixed SIP delay line Td/Tr=5
Delay 15 /-1 ns, fixed SIP delay line Td/Tr=5
|
Coilcraft, Inc.
Data Delay Devices Inc
|
| MK2308S-1 MK2308S-1I MK2308S-1IT MK2308S-1T MK2308 |
3.3 VOLT ZERO DELAY, LOW SKEW BUFFER 3.3伏零延迟，低偏移的缓冲区
3.3 VOLT ZERO DELAY / LOW SKEW BUFFER
|
Kingbright, Corp.
ICST[Integrated Circuit Systems]
|
| 1505 1505-50B 1505-50G 1505-5B 1505-50A 1505-50C 1 |
Delay 300 /-15 ns, 5-TAP SIP delay line Td/Tr=3
Delay 100 /-5 ns, 5-TAP SIP delay line Td/Tr=3
Delay 60 /-3 ns, 5-TAP SIP delay line Td/Tr=3
Delay 30 /-2 ns, 5-TAP SIP delay line Td/Tr=3
Fixed 5-tap passive SIP delay line
PASSIVE DELAY LINE, TRUE OUTPUT, PSIP7
Delay 70 /-3.5 ns, 5-TAP SIP delay line Td/Tr=3
Delay 75 /-3.5 ns, 5-TAP SIP delay line Td/Tr=3
Delay 90 /-5 ns, 5-TAP SIP delay line Td/Tr=3
Delay 40 /-2.5 ns, 5-TAP SIP delay line Td/Tr=3
Delay 50 /-3 ns, 5-TAP SIP delay line Td/Tr=3
Delay 20 /-1.5 ns, 5-TAP SIP delay line Td/Tr=3
Delay 200 /-10 ns, 5-TAP SIP delay line Td/Tr=3
Delay 5 /-1 ns, 5-TAP SIP delay line Td/Tr=3
|
DATA DELAY DEVICES INC
|
| W132 W132-09BX W132-10BX |
Spread Aware(TM)-designed to work with SSFTG reference signals
Spread Aware?, Ten/Eleven Output Zero Delay Buffer
SPREAD AWARE, TEN/ELEVEN OUTPUT ZERO DELAY BUFFER
|
Cypress
|
| UPD424280LLE-A80 UPD424280LLE-A70 UPD424280AG5M-80 |
x18 Fast Page Mode DRAM
Quad PLL Clock Generator with Serial Interface (I2C)
Low-Cost 3.3V Spread Aware™ Zero Delay Buffer
MediaClock™ MPEG Clock Generator with VCXO
MediaClock™ PDP Clock Generator
Field and Factory-Programmable Spread Spectrum Clock Generator for EMI Reduction
HOTLink II™ SMPTE Receiver Training Clock
3.3V Zero Delay Buffer x18快速页面模式的DRAM
|
|
| CY23S08ZXC-1HT |
3.3V Zero Delay Buffer
|
Cypress Semiconductor
|
| XRK32308 XRK32308-2 XRK32308-1 XRK32308-1H XRK3230 |
3.3V ZERO DELAY BUFFER
|
Exar Corporation
|
